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HT9320 Series 22-Memory Tone/Pulse Dialer
Patent Number: 64097, 86474, 113235(R.O.C.), 5424740(U.S.A.)
Features
* Universal specification * Operating voltag0e: 2.0V~5.5V * Low standby current * Lowmemoryretentioncurrent:0.1mA(typ.) * Tone/pulse switchable * Interface with LCD driver * 32 digits for redialing * 32 digits for the SA memory dialing * One-key redialing * Pause and P(R)T key for PBX * 3.58MHz crystal or ceramic resonator * Hand-free control * Hold-line control * Pause, P(R)T can be saved for redialing * On-hook store function * Keytone function * Lock function * Resistor options - M/B ratio - Flash function and flash time - Pause and P(R)T duration - Pulse number - Inter-digit pause time for 10pps * Memory number: 22 memories * HT9320A/B/H/K/L-X: 28-pin DIP package
HT9320C: 22-pin SKDIP package
General Description
The HT9320 series tone/pulse dialers are CMOS LSI for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. The HT9320 series are offered in six different versions. The different functions of the six versions are listed in the selection table. The HT9320A, HT9320H versions provide the on-hook store function; the HT9320B version provides the LCD interface function; the HT9320K version provides the keytone function; the HT9320L version provides both the LCD interface function and IDD lock function. The six versions also supply the hold-line and hand-free functions, which are suitable for feature phone applications. H T 9 3 2 0 se r i e s p r o vi d e S A , R e d i a l a n d 2 0 one-touch/two-touch memory dialing. If the keyboard includes M1~M20 keys it can be used as one-touch memory dialing. Otherwise, it works as two-touch (PAGE(R)M1~M10) or three-touch(A(R)PAGE(R)0~9) memory dialing for speed dialing in either pulse or tone mode.
Rev. 1.10
1
October 1, 2002
HT9320 Series
Selection Table
Function Part No. Memory Dialing Hold- HandLine Free LCD Interface Flash Function Flash Time (ms) 600 600/300/98 600 600/300/98 600 600/300/98 600/100 600 600/300/98 600 600/300/98 Pulse No. Tone Duration (ms) 82.5 InterTonePause (ms) 85.5 M/B Pin IDD Lock KeyTone Output OnHook Store Package
HT9320A
SA, R M1~M20 SA, R M1~M20 SA, R M1~M20 SA, R M1~M20 SA, R M1~M20 SA, R M1~M20
Control O O 3/4 Digit Control O O O Digit Control 3/4 3/4 3/4 Digit O O 3/4 Digit Control O O 3/4 Digit Control O O O Digit
N, N+1 10-N N, N+1 10-N N, N+1 10-N N N, N+1 10-N N, N+1 10-N
O
3/4
3/4
O
28 DIP
HT9320B
82.5
85.5
3/4
3/4
3/4
3/4
28 DIP
HT9320C
82.5
85.5
3/4
3/4
3/4
3/4
22SKDIP
HT9320H
82.5
85.5
O
3/4
3/4
O
28 DIP
HT9320K
82.5
85.5
3/4
3/4
O
3/4
28 DIP
HT9320L
82.5
85.5
3/4
O
3/4
3/4
28 DIP
HT9320L-X
The same as HT9320L, but the voltage polarity of the row group and the column group are reversed.
Block Diagram
HST
C1 Key C o lu m n C8
.SM
C o n tro l
C heck
DOUT CLO CK Tone O ut P u ls e O ut DTM . PO XM UTE
Key . u n c tio n E ncoder
W RM C o u n te r ADDRL
SRAM
Tone E ncoder C o n v e rte r
R1 Key Row R5
E ncoder K e y to n e C ir c u it . la s h M o d e In H D /H . HKS H.I HDI HDO H.O MODE
D ebounce
X1 X2
D iv id e r
C lo c k G e n e ra to r
M /B
T im e r
M /B
KT
Rev. 1.10
2
October 1, 2002
HT9320 Series
Pin Assignment
C8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 HST R1 R2 R3 R4 R5 HKS M /B H.I MODE X1 X2 VDD 28 27 26 25 24 23 22 21 20 19 18 17 16 15 C7 C6 C5 C4 C3 C2 C1 PO H.O XM UTE DTM . HDI HDO VSS C8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DOUT R1 R2 R3 R4 R5 HKS CLO CK H.I MODE X1 X2 VDD 28 27 26 25 24 23 22 21 20 19 18 17 16 15 C7 C6 C5 C4 C3 C2 C1 PO H.O XM UTE DTM . HDI HDO VSS C8 R1 R2 R3 R4 R5 HKS MODE X1 X2 VDD 9 10 11 8 7 6 5 4 3 2 1 22 21 20 19 18 17 16 15 14 13 12 C7 C6 C5 C4 C3 C2 C1 PO XM UTE DTM . VSS C8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 KT R1 R2 R3 R4 R5 HKS NC H.I MODE X1 X2 VDD 28 27 26 25 24 23 22 21 20 19 18 17 16 15 C7 C6 C5 C4 C3 C2 C1 PO H.O XM UTE DTM . HDI HDO VSS
H T 9 3 2 0 A /H 2 8 D IP -A
H T 9 3 2 0 B /L /L -X 2 8 D IP -A
H T9320C 2 2 S K D IP -A
H T9320K 2 8 D IP -A
Keyboard Information
HT9320A/B/C/K/L HT9320H
* O n e -to u c h m e m o ry k e y b o a rd
C1 R1 R2 1 4 7 * /T 0 8 # 5 9 R3 R4 R5 SA
* O n e -to u c h m e m o ry k e y b o a rd
C5
M1
C2
P 2
C3
C4
C6
M6 M7 M8 M9 M 10
C7
M 11 M 12 M 13 M 14 M 15
C8
M 16 M 17 M 18 M 19 M 20
R1 R2 R3 R4 R5
C1 SA 1
C2
C3
C4
P(R) T
C5
M1 M2
C6
M6 M7 M8 M9 M 10
C7
M 11 M 12 M 13 M 14 M 15
C8
M 16 M 17 M 18 M 19 M 20
3 6
.
M2 M3
2 3 5 6 8 9 0 # * 7 4
.
M3 ST R /P M4 M5
ST R
M4 M5
* T w o -to u c h m e m o ry k e y b o a rd
C1 R1 R2 1 4 7 * /T 0 8 # R 5 9 R3 R4 R5 SA
* T w o -to u c h m e m o ry k e y b o a rd
C5
M 1/ M1 M 2/ M1 M 3/ M1 M 4/ M1 M 5/ M1 1 2 3 4 5
C2
P 2
C3
PAGE 3
C4
C6
M 6/ M 16 M 7/ M 17 M 8/ M 18 M 9/ M 19 M 10/ M 20
R1 R2
C1 SA
C2
2 5
C3
PAGE 3
C4
P(R) T .
C5
M1 M M2 M M3 M M4 M M5 M / 11 / 12 / 13 / 14 / 15
C6
M 6/ M 16 M 7/ M 17 M 8/ M 18 M 9/ M 19 M 10/ M 20
. 6 ST
1 4 8 7 0 *
R3 R4 R5
6 9 #
A ST R /P
* T h re e -to u c h m e m o ry k e y b o a rd
C1 R1 R2 1 4 7 * /T 0 8 # R 5 9 R3 R4 R5 SA
* T h re e -to u c h m e m o ry k e y b o a rd
C1 R1 SA 2 5 4 8 7 0 * # 9 6 A ST R /P 1
C2
P 2
C3
PAGE 3
C4
C2
C3
PAGE 3
C4
P(R) T .
. 6 A ST
R2 R3 R4 R5
Rev. 1.10
3
October 1, 2002
HT9320 Series
Memory dialing vs. keyboard form table Dialing Output M1~M10 M11~M20 One-Touch Memory Keyboard M1 ~ M10 M11 ~ M20 Two-Touch Memory Keyboard A a (a=1~9, 0) A PAGE a (a=1~9, 0) Three-Touch Memory Keyboard
PAGE Ma (Ma=M1~M10)
Pin Description
Pin Name I/O Internal Connection Description These pins form a 58 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C8) remains low and the row group (R1~R5) is set high for key input detection. For the HT9320L-X, the column group remains high and the row group is set low for key input detection. An inexpensive single contact 58 keyboard can be used as an input device. Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection. The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. XMUTE is used to mute the speech circuit when transmitting the dial signal. This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI/HDI (hand-free/hold-line control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the stand-by mode and ready to receive the key input. This pin is a CMOS output structure which by receiving the HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, this pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high. This is a three-state input/output pin, used for dialing mode selection, either Tone mode or Pulse mode, 10pps/20pps MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps MODE=VSS: Tone mode During the pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to the tone mode. When the chips are in tone mode, switching to the pulse mode will also be recognized. This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor should not be less than 5kW.
C1~C8 R1~R5
I/O
CMOS IN/OUT
X1
I OSCILLATOR
X2
O
XMUTE
O
NMOS OUT
HKS
I
CMOS IN
PO
O
CMOS OUT
MODE
I/O
CMOS IN/OUT
DTMF
O
CMOS OUT
Rev. 1.10
4
October 1, 2002
HT9320 Series
Pin Name I/O Internal Connection CMOS IN Pull-high Description This pin is a Schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the HDO output once. An external RC network is recommended for input debouncing. The pull-high resistance is 200kW typ. The HDO is a CMOS output structure. Its output is toggle- controlled by a negative transition on HDI. When HDO is toggled high, PO keeps high to hold the line. The hold function can be released by setting HFO high or by an on-off hook operation or by another HDI input. Refer to the functional description for the hold-line function. This pin is a Schmitt trigger input structure. Active high. Applying a positive going pulse to HFI can toggle the HFO once and hence control the hand-free function. An external RC network is recommended for input debouncing. The pull-low resistance of HFI is 200kW typ. The HFO is a CMOS output structure. Its output is toggle- controlled by a positive transition on the HFI pin. When HFO is high, the hand-free function is enabled and PO outputs a high to connect the line. The hand-free function can be released by an on-off-hook operation or by another HFI input or by setting HDO high. Refer to the functional description for the hand-free function operation. NMOS open drain output pin. It outputs the BCD code of the dialing digits to the LCD driver chip (HT16XX series) or MCU for dialing number display. Refer to the functional description for the detailed timing. NMOS open drain output. When dialing, it outputs a series of pulse trains for DOUT data synchronization. DOUT data is valid at the falling edge of clock. Positive power supply, 2.0V~5.5V for normal operation Negative power supply, ground On-hook store enable input HST=VDD: On-hook store (HT9320A/H) HST=Floating: Off-hook store (HT9320A) HST=VSS: Off-hook store (HT9320H) The Pull-low resistance is 200kW typ. Make/Break ratio selection M/B=VSS: 33.3/66.6 (HT9320A) M/B=Floating: 40/60 (HT9320A) M/B=VDD: 33.3/66.6 (HT9320H) M/B=VSS: 40/60 (HT9320H) The pull-high resistance is 200kW typ. Keytone output pin. Outputs a 1.2kHz tone carrier for 34ms each time a key is pressed in the pulse mode.
HDI
I
HDO
O
CMOS OUT
HFI
I
CMOS IN Pull-low
HFO
O
CMOS OUT
DOUT
O
NMOS OUT
CLOCK VDD VSS
O 3/4 3/4
NMOS OUT 3/4 3/4 CMOS IN Pull-low (HT9320A)
HST
I CMOS IN (HT9320H) CMOS IN Pull-high (HT9320A)
M/B
I CMOS IN (HT9320H)
KT
O
CMOS OUT
Rev. 1.10
5
October 1, 2002
HT9320 Series
Approximate internal connection circuits
C M O S IN P u ll- h ig h
C M O S IN /O U T
V
DD
NMOS OUT
C M O S IN
CMOS OUT
V
DD
C M O S IN P u ll- lo w
O S C IL L A T O R
X1 20p. 10M X2 10p. EN
Absolute Maximum Ratings
Supply Voltage ...........................................-0.3V to 6V Input Voltage .............................. VSS-0.3 to VDD+0.3V Storage Temperature ...........................-50C to 125C Operating Temperature ..........................-20C to 75C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristics
Symbol VDD IDD Parameter Operating Voltage Operating Current Test Conditions VDD 3/4 Pulse 2.5V Tone ISTB VR IR VIL VIH IXMO IOLXM IHKS RHFI RHDI RM/B Standby Current Memory Retention Voltage Memory Retention Current Input Low Voltage Input High Voltage XMUTE Leakage Current XMUTE Sink Current HKS Pin Input Current HFI Pull-low Resistance HDI Pull-high Resistance M/B Pull-high Resistance 1V 3/4 1V 3/4 3/4 3/4 On-hook 3/4 3/4 VXMUTE=12V No entry Conditions 3/4 Off-hook, Keypad entry, no load Min. 2 3/4 3/4 3/4 1 3/4 VSS 0.8VDD 3/4 1 3/4 3/4 3/4 3/4
fOSC=3.5795MHz, Ta=25C Typ. 3/4 0.2 0.6 3/4 3/4 0.1 3/4 3/4 3/4 3/4 3/4 200 200 200 Max. 5.5 1 2 1 5.5 0.2 0.2VDD VDD 1 3/4 0.1 3/4 3/4 3/4 Unit V mA mA mA V mA V V mA mA mA kW kW kW
On-hook, no load No entry 3/4
2.5V VXMUTE=0.5V 2.5V VHKS=2.5V 2.5V VHFI=2.5V 2.5V VHDI=0V 2.5V VM/B=0V
Rev. 1.10
6
October 1, 2002
HT9320 Series
Symbol RHST IOH1 IOL1 IOH2 IOL2 IOH3 IOL3 IOH4 IOL4 TFP TRP TDB TBRK fOSC Parameter HST Pull-low Resistance Keypad Pin Source Current Keypad Pin Sink Current HFO Pin Source Current HFO Pin Sink Current HDO Pin Source Current HDO Pin Sink Current KT Pin Source Current KT Pin Sink Current Pause Time After Flash Pause Time for One-key Redialing Key-in Debounce Time Break Time for One-key Redialing System Frequency Test Conditions VDD Conditions Min. 3/4 -4 200 -1 1 -1 1 -1 1 3/4 3/4 3/4 3/4 3/4 Typ. 200 3/4 400 3/4 3/4 3/4 3/4 3/4 3/4 0.2 1 1 20 1.2 Max. 3/4 -40 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Unit kW mA mA mA mA mA mA mA mA s s s ms s MHz
2.5V VHST=2.5V 2.5V VOH=0V 2.5V VOL=2.5V 2.5V VOH=2V 2.5V VOL=0.5V 2.5V VOH=2V 2.5V VOL=0.5V 2.5V VOH=2V 2.5V VOL=0.5V 3/4 3/4 3/4 3/4 3/4 Control key Digit key One-key redialing 3/4 One-key redialing Crystal=3.5795MHz
3.5759 3.5795 3.5831
Pulse Mode Electrical Characteristics
Symbol IPOH IPOL PR Parameter PO Output Source Current PO Output Sink Current Pulse Rate Test Conditions VDD 2.5V VOH=2V 2.5V VOL=0.5V 3/4 MODE pin is connected to VDD MODE pin is opened A resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=VSS (HT9320A) M/B Make/Break Ratio 3/4 M/B=VDD (HT9320H) 3/4 Conditions Min. -0.2 0.2 3/4 3/4
fOSC=3.5795MHz, Ta=25C Typ. 3/4 0.6 10 20 Max. 3/4 3/4 3/4 3/4 Unit mA mA pps
33:66
3/4 %
No resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=Floating (HT9320A) M/B=VSS (HT9320H) M/B ratio=40:60 3/4 3/4 40 (10pps) 20 (20pps) 33 (10pps) 17 (20pps) 3/4 ms M/B ratio=33:66 3/4 3/4 40:60 3/4
TPDP
Pre-digit-pause Time
3/4
Rev. 1.10
7
October 1, 2002
HT9320 Series
Symbol Parameter Test Conditions VDD Conditions Pulse rate=10pps. No resistor is linked between R1 and C5 (HT9320A/B/C/K) TIDP Inter-digit-pause Time 3/4 Pulse rate=10pps (HT9320H/L) Pulse rate=10pps. A resistor is linked between R1 and C5 (HT9320A/B/C/K) Pulse rate=20pps A resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=VSS (HT9320A) TM Pulse Make Duration 3/4 M/B=VDD (HT9320H) ms No resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=Floating (HT9320A) M/B=VSS (HT9320H) A resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=VSS (HT9320A) TB Pulse Break Duration 3/4 M/B=VDD (HT9320H) ms No resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=Floating (HT9320A) M/B=VSS (HT9320H) TKT FKTC Keytone Duration Keytone Carrier 3/4 3/4 Pulse mode (HT9320K) Pulse mode (HT9320K) 3/4 3/4 34 1.2 3/4 3/4 ms kHz 3/4 60 (10pps) 30 (20pps) 3/4 3/4 3/4 40 (10pps) 20 (20pps) 3/4 3/4 ms 3/4 3/4 400 500 3/4 3/4 Min. Typ. Max. Unit
3/4
800
3/4
33 (10pps) 17 (20pps)
3/4
66 (10pps) 33 (20pps)
3/4
Tone Mode Electrical Characteristics
Symbol VTDC ITOL VTAC RL ACR THD TTMIN TITPM Parameter DTMF Output DC Level DTMF Sink Current DTMF Output AC Level DTMF Output Load Column Pre-emphasis Tone Signal Distortion Minimum Tone Duration Minimum Inter-tone Pause Test Conditions VDD 3/4 2.5V VDTMF=0.5V 3/4 Row group, RL=5kW Conditions 3/4 Min. 0.45VDD 0.1 0.12 5 1 3/4 3/4 3/4
fOSC=3.5795MHz, Ta=25C Typ. 3/4 3/4 0.155 3/4 2 -30 82.5 85.5 Max. 0.7VDD 3/4 0.18 3/4 3 -23 3/4 3/4 Unit V mA Vrms kW dB dB ms ms
2.5V THD-23dB 2.5V Row group=0dB 2.5V RL=5kW 3/4 3/4 Auto-redial Auto-redial
THD (Distortion) (dB) = 20 log ( V12 + V22 + K Vn2 / Vi2 + Vh2 ) Vi, Vh: Row group and column group signals V1, V2, ... Vn: Harmonic signals (BW=300Hz~3500Hz)
Rev. 1.10
8
October 1, 2002
HT9320 Series
Functional Description
Keyboard matrix C1~C8 and R1~R5 form a keyboard matrix. Together with a standard 58 keyboard, the keyboard matrix is used for dialing entries. In addition, the keyboard matrix also provides resistor options for different dialing specification selections. The keyboard arrangement for the HT9320 series are shown in the Keyboard Information. Tone frequency Tone Name R2 R3 R4 R5 C1 C2 C3 Output Frequency (Hz) Specified 697 770 852 941 1209 1336 1477 Actual 699 766 847 948 1215 1332 1472 +0.29% -0.52% -0.59% +0.74% +0.50% -0.30% -0.34% RK21 % Error RK31 RK41 Option Resistor RK12 (HT9320B/C/K/L) RK13 RK14 Option Function Ratio Selection Flash Function/ Time Selection Pause & P(R)T Duration Selection Pulse Number Selection Default (No Resistor) 40:60 Flash=control function Flash time=600ms TP= 3.6s TP(R)T= 3.6s
N
Inter-digitRK51 Pause Time for (HT9320A /B/C/K) 10pps RK51 RK61 RK71 (HT9320L) International Direct Dialing Lock Selection
800ms
Normal dialing (unlock)
Note: % Error does not contain the crystal frequency drift Dialing specification selection Various dialing specifications can be selected by adding resistors across keyboard matrix pins. The allowable option resistor connections are shown on the table.
C1 R1 R2 R3 R4 R R R
K12 K13 K14
M/B ratio selection table
* HT9320A
M/B Pin VSS Floating
M/B Ratio (%) 33.3:66.6 40:60
C2 R
C3 R
C4 R
C5 R
C6 R
C7 R
K21
K31
K41
K51
K61
K71
* HT9320B/C/K/L
RK12 No Yes
* HT9320H
M/B Ratio (%) 40:60 33.3:66.6
All the resistors are 330kW. The resistor option functions and the default specifications (without option resistors) are listed below (HT9320A/B/C/K/L).
M/B Pin VDD VSS
M/B Ratio (%) 33.3:66.6 40:60
Rev. 1.10
9
October 1, 2002
HT9320 Series
Flash function/time (duration) selection table
* HT9320A/B/C/K/L * HT9320H/L
Inter-digit pause time Flash Function Control Digit Digit Digit Flash Time (TF) 600ms 600ms 98ms 300ms Pulse number table Keypad Digit Key 1 2 N 1 2 3 4 5 6 7 8 9 10 P(R)T Ignored Output Pulse Number 10-N 9 8 7 6 5 4 3 2 1 10 P(R)T Ignored N+1 2 3 4 5 6 7 8 9 10 1 P(R)T Ignored 800ms
RK13 No No Yes Yes
* HT9320H
RK14 No Yes No Yes
3 Flash Function Digit Digit Flash Time (TF) 600ms 100ms 4 5 6 7 8
M/B Pin VSS VDD
Pause and P(R)T duration selection table
* HT9320A/B/C/K/L
9 0 */T #
RK21 No Yes
* HT9320H
TP (sec) 3.6 2
TP(R)T (sec) 3.6 1
DOUT BCD code When dialing, the corresponding 4-bit BCD codes are serially presented on DOUT from MSB to LSB. The data of DOUT is valid at the falling edge of the CLOCK pin. The following table lists the BCD codes corresponding to the keyboard input. Key-In 1 RK41 No Yes No Yes Pulse Number N N+1 10-N 3/4 2 3 4 5 6 7 BCD Code 0001 0010 0011 0100 0101 0110 0111 Key-In 8 9 0 */T # F P BCD Code 1000 1001 1010 1101 1100 1011 1110
TP (sec) 3.6 Pulse number selection table
* HT9320A/B/C/K/L
TP(R)T (sec) 3.6
RK31 No No Yes Yes
* HT9320H
On hook store (HT9320A/H) Pulse Number N When the external power supply (2V~5.5V) is used and the HST pin is connected to VDD, the user can store dialing numbers to the memories (M1~M20) during on-hook state. On/Off hook store selection table HST Pin Inter-digit pause time 800ms 400ms VDD (HT9320A/H) Floating (HT9320A) VSS (HT9320H) Hook Store Mode On-hook store Off-hook store Off-hook store
Inter-digit-pause time for 10pps
* HT9320A/B/C/K
RK51 No Yes
Rev. 1.10
10
October 1, 2002
HT9320 Series
Lock function (HT932L) This function aims to detect lock dialing numbers to prevent from an unauthorized long distance call. The dialing output of this chip is disabled if the first input key after on-off hook is the lock number when the lock function is enabled. International direct dialing lock (IDD lock) selection table RK51 No No No Yes RK61 No No Yes 3/4 RK71 No Yes 3/4 3/4 Lock Function Normal dialing without lock function To lock 0 To lock 0, 9 IDD lock operation by the telephone keyboard. (See keyboard operation) Hold-line function operation
* Hold-line function execution
When HDO is low, a falling edge triggers the HDI, enabling the Hold-line function (HDO becomes high). The XMUTE remains low when HDO is high.
* Reset Hold-line function
When HDO is high, the Hold-line function is enabled and can be reset by:

Off-hook Applying a falling edge to HDI Changing the HFO pin from low to high
* Hold-line function table
C u rre n t S ta te HKS H H H H L L L L X X L H X : D o n 't c a r e A n:U nchanged H L X X L H L X L H L X X L X L L H L H L X L HDO L X L H.O H.I L H In p u t HDI HKS An L H L L L H L An L An An L An An An H An N e x t S ta te HDO H.O An L An L An L An An H
Note: 3/4 stands for dont care Hand-free function operation
* Hand-free function execution
When HFO is low, a rising edge triggers the HFI, enabling the Hand-free function (HFO becomes high).
* Reset Hand-free function
When HFO is high, the Hand-free function is enabled and can be reset by:

Off-hook Applying a rising edge to HFI Changing the HDO pin from low to high
H : L o g ic H IG H L : L o g ic L O W
: R is in g e d g e : . a llin g e d g e
* Hand-free function table
C u rre n t S ta te HKS H H H H L L L L X X L L X : D o n 't c a r e A n:U nchanged H L X X H L L X H H X X L L X H H L H L L X H H.O L X H HDO HDI H L In p u t H.I HKS An L H L L L H L An L An An L An An An H An N e x t S ta te H.O HDO An L An L An L An An H
Key definition
* 0,1,2,3,4,5,6,7,8,9 keys
These are dialing number input keys for both the pulse mode and the tone mode operations.
* */T
This key executes the P(R)T function and wait a TP(R)T duration in the pulse mode. On the other hand, the */T key executes the * function in the tone mode.
* * (HT9320H)
The * key executes the * tone output function in the tone mode. No response in the pulse mode.
* P(R)T
The key executes the P(R)T function in the pulse mode. No response in the tone mode.
*#
H : L o g ic H IG H L : L o g ic L O W
: R is in g e d g e : . a llin g e d g e
This is a dialing signal key for the tone mode only, no response in the pulse mode.
Rev. 1.10
11
October 1, 2002
HT9320 Series
* SA * ST
Pressing this key can save the preceding dialing telephone numbers. The saved number is redialed if it is pressed again. SA will also redial the saved number if it is the first key pressed at the off-hook state. During the dialing signal transmission, the SA key is inhibited.
*F
Store key. The execution of this key actuates the store memory function with (or without) dialing output. During the dialing signal transmission, the ST key is inhibited.
*A
The flash key can be selected as a digit or as a control key by the option resistors RK13 & RK14. Pressing the flash key will force the PO pin to be low for the TF duration and is then followed by TFP (sec). TF can also be selected by RK13, RK14.
*P
Auto key. When this key is pressed before pressing any one of the digital keys (0~9) it executes the two-touch/ three-touch memory dialing function.
* PAGE
Pause key. The execution of this key can pause the output for the TP duration. TP can be selected by RK21.
*R
M11~M20 are represented by pressing the PAGE key and the digital keys (0~9) or M1~M10. That is to say, A PAGE digit key (0~9) or PAGE(R)M1~M10 executesM11~M20memorydialing.
* M1~M20
Redial key. Executes redialing as well as one-key redial function.
* R/P
One-touch memory dialing for speed-dialing in either pulse or tone mode.
Redial and pause function key. If it is pressed as the first key after off-hook, this key executes the redial function. Otherwise, it works as the pause key.
Rev. 1.10
12
October 1, 2002
HT9320 Series
Keyboard operation The following operations are described under an on-off-hook or on-hook condition with the hand-free active condition.
* N o r m a l d ia lin g P u ls e m o d e D2 ... D n ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 RM :D1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M :D 1 D 2 ... D n D1 Dm D 2 ... D n T P (R) T P u ls e * /T D n + 1 ... D m D n + 1 ... D m Tone R M :D 1 D 2 ... D n D2 ... D n * /T D n+1 ... D 2 ... D n Tone m ode ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 RM :D1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 S A M :U nchanged D1 Dm D 2 ... D n * D n + 1 ... D m * D n + 1 ... D m D2 ... D n * /T D n+1 ... D2 ... D n D 2 ... D n
S A M :U nchanged
N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its a r e e n te r e d , th e s ig n a l is tr a n s m itte d b u t th e r e d ia l fu n c tio n is in h ib ite d . * R e d ia l P u ls e m o d e D 2 ... D n R D 2 ... D n ( a ) w ith o u t * /T , P (R) T RM c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged ( b ) w ith * /T R M c o n te n t: D 1 D 2 ... D n * /T T D n + 1 ... D m
P(R) T
Tone m ode ( a ) w ith o u t * /T , P (R) T RM c o n te n t: D 1 D 2 ... D n R D 2 ... D n K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged ( b ) w ith * /T RM c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m * D n + 1 ... D m
K e y b o a r d in p u t: [ R
D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged
o r R /P ]
D 2 ... D n P u ls e D n + 1 ... D m Tone
K e y b o a r d in p u t: [ R
D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged
o r R /P ]
D 2 ... D n
N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D
Rev. 1.10
13
October 1, 2002
HT9320 Series
* O n e - k e y r e d ia l P u ls e m o d e D2 ... D n
BRK
Tone m ode ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D2 ... D n T
BRK
( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R T
RP
R T
RP
RM :D1
D 2 ... D n T P u ls e D 1 D 2 ... D n P u ls e D 2 ... D n
D ia lin g o u tp u t: D 1 D 2 ... D n ... D n R M : D 1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 T R M :D 1 D 2 ... D n
BRK
D1
D2
S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1
D1 Dm
D2 R
... D n
* /T
D n + 1 ...
D1 Dm
D2 R
... D n
* /T
D n + 1 ...
R M :D 1
D 2 ... D n T P (R) T D n + 1 ... D m P u ls e Tone T B R K T R P D 1 D 2 ... D n T P T P u ls e D n + 1 ... D m Tone D 2 ... D n * /T D n + 1 ... D m
D 2 ... D n T
RP
* D n + 1 ... D m D 2 ... D n * D n+1
... D m
D1
* D n + 1 ... D m
S A M :U nchanged
S A M :U nchanged
N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D
* P ause
K e y b o a r d in p u t:
D ia lin g o u tp u t: D 1 RM :D1 D 2 ... D n
D1
P
D2
... D n
T
P
[P
o r R /P ]
Dn+1
... D m
D 2 ... D n
D n + 1 ... D m
D n + 1 ... D m
S A M :U nchanged * S A copy P u ls e m o d e D2 ... D n SA ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n D 2 ... D n D 2 ... D n Tone m ode ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n D 2 ... D n D2 ... D n SA D 2 ... D n
( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n
D1 Dm
D2 SA
... D n
* /T
D n + 1 ...
D n + 1 ... D m Tone
( b ) w ith * /T K e y b o a r d in p u t:
D1
D2
... D n
*
* /T
D n + 1 ...
D 2 ... D n T P (R) T P u ls e * /T D n + 1 ... D m * /T D n + 1 ... D m
Dm SA D ia lin g o u tp u t: D 1 D 2 ... D n
R M :D 1 SAM :D 1 D 2 ... D n D 2 ... D n
D n + 1 ... D m
* D n + 1 ... D m * D n + 1 ... D m
D 2 ... D n
N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its p lu s th e " S A " k e y a r e e n te r e d , th e S A V E fu n c tio n w ill n o t b e e x e c u te d , a n d a ll th e e x is tin g d a ta in th e s a v e m e m o r y w ill n o t b e c h a n g e d .
Rev. 1.10
14
October 1, 2002
HT9320 Series
* S A d ia lin g P u ls e m o d e D2 ... D n ( a ) w ith o u t * /T SAM c o n te n t: D 1 K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged ( b ) w ith * /T S A M c o n te n t: D 1 K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged * M e m o ry s to re O n e - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t Ma K e y b o a r d in p u t: S T D ia lin g o u tp u t: M a:D1 RM :D1 D 2 ... D n D 2 ... D n D1 D2 ... D n ST O n e - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 M a:D1 RM :D1 D 2 ... D n D 2 ... D n D2 ... D n ST ST Ma D 2 ... D n D 2 ... D n P u ls e T
P(R) T
Tone m ode ( a ) w ith o u t * /T SAM c o n te n t: D 1 D 2 ... D n D 2 ... D n K e y b o a r d in p u t: S A
D 2 ... D n
D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged ( b ) w ith * /T S A M c o n te n t: D 1
D 2 ... D n
* /T
D n + 1 ... D m D n + 1 ... D m Tone
D 2 ... D n
* D n + 1 ... D m * D n + 1 ... D m
K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 D 2 ... D n R M :U nchanged S A M :U nchanged
S A M : U nchanged T w o - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t (M 1 ~ M 1 0 ) K e y b o a r d in p u t: S T D 1 D 2 ... D n S T [ b or M b ] (M 1 1 ~ M 2 0 ) K e y b o a r d in p u t: S T D 1 D 2 PAGE [ b D ia lin g o u tp u t: M b:D1 M a:D1 RM :D1 D 2 ... D n D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) D 2 ... D n ... D n S T or M b ]
S A M : U nchanged T w o - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t (M 1 ~ M 1 0 ) K e y b o a r d in p u t: D 1 (M 1 1 ~ M 2 0 ) [ b D2 or ... D n Mb ] ST ST
K e y b o a r d in p u t: D 1 D 2 ... D n S T S T PAG E [ b or M b ] D ia lin g o u tp u t: D 1 M b:D1 M a:D1 RM :D1 D 2 ... D n D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) D 2 ... D n D 2 ... D n
S A M : U nchanged T h r e e - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t (M 1 1 ~ M 2 0 ) K e y b o a r d in p u t: S T D 1 D 2 ... D n S T PAG E [ b or M b ] D ia lin g o u tp u t: M a:D1 RM :D1 D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) D 2 ... D n
S A M : U nchanged T h r e e - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t (M 1 1 ~ M 2 0 ) K e y b o a r d in p u t: D 1 D 2 ... D n S T S T PAGE D ia lin g o u tp u t: D 1 M a:D1 RM :D1 D 2 ... D n [ b or Mb ] D 2 ... D n
D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 )
S A M : U nchanged
S A M : U nchanged
N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , th e m e m o r y s to r e is in h ib ite d . H o w e v e r , if th e d ia lin g n u m b e r is n o t m o r e th a n 3 2 d ig its th e m e m o r y w ill s to r e a m a x . o f 1 6 d ig its . M a=M 1~M 20,M b=M 1~M 10,a=1~20,b=1~9,0
Rev. 1.10
15
October 1, 2002
HT9320 Series
* M e m o r y d ia lin g O n e - to u c h m e m o r y d ia lin g ( M 1 ~ M 2 0 ) M a c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 M a:U nchanged RM :D1 D 2 ... D n S A M : U nchanged T w o - to u c h m e m o r y d ia lin g ( M 1 ~ M 1 0 ) M b c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 M b:U nchanged RM :D1 D 2 ... D n S A M : U nchanged D 2 ... D n A [b D 2 ... D n or M b ] D 2 ... D n Ma D 2 ... D n T h r e e - to u c h m e m o r y d ia lin g ( M 1 1 ~ M 2 0 ) M 1 1 c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 RM :D1 D 2 ... D n A D 2 ... D n PAGE D 2 ... D n [Mb or b ]
M a : U n c h a n g e d (a = b + 1 0 , M 1 0 = M 0 ) S A M : U nchanged
N o te : a = 1 ~ 2 0 , M a = M 1 ~ M 2 0 M b=M 1~M 10,b=1~9,0
* C h a in d ia lin g M 1 c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 M 1 /M 2 : U n c h a n g e d RM :D1 D2 D3 D1 D 2 ... D n D n + 1 ... D m S A M :U nchanged D 2 ... D n D1 D2 D2 D3 D3 D1 [M 1 or A 1 ] [M 2 or A 2 ] M 2 c o n te n t: D n + 1 ... D m D 2 ... D n D n + 1 ... D m
N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D
* . la s h . la s h a s a d ig ita l k e y D1 Dm D2 ... D n T
.
. la s h a s a c o n tr o l k e y K e y b o a r d in p u t: D1 Dm D2 ... D n T
.
( a ) T h e in te r v e n ie n t k e y K e y b o a r d in p u t: . T
.P
. T
.P
Dn+1
...
Dn+1
...
D ia lin g o u tp u t: D 1 D 2 ... D n Dm R M : D 1 D 2 ... D n S A M :U nchanged ( b ) T h e fir s t k e y K e y b o a r d in p u t: D ia lin g o u tp u t: T
.
D n + 1 ...
D ia lin g o u tp u t: D 1 D 2 ... D n Dm R M : D n + 1 ... D m S A M :U nchanged
D n + 1 ...
. T
D1
.P
D2 D1
... D n D2 Dn
N o te : T
.
: b r e a k a fla s h tim e
R M :U nchanged S A M :U nchanged
Rev. 1.10
16
October 1, 2002
HT9320 Series
* ID D lo c k o p e r a tio n b y th e k e y b o a r d ( 2 lo c k n u m b e r s , 3 d ig its /n u m b e r a t m a x im u m ) ( A 3 3 0 k W r e s is to r is c o n n e c te d b e tw e e n C 5 a n d R 1 )
P e r s o n a l/L o c k N o .1 /L o c k N o .2 in p u t o p e r a tio n ( a ) P e r s o n a l c o d e d o e s n 't e x is t S to re s P e rs o n a l C o d e : S T S to re s L o c k N o .1 : S T S to re s L o c k N o .2 : S T ( b ) P e r s o n a l c o d e e x is t C h a n g e s P e rs o n a l C o d e : S T C h a n g e s L o c k N o .1 : S T D1 D2 D3 ST # ST D4 D5 D6 ST *0 ( O ld p e r s o n a l c o d e ) D1 D2 D3 ST # ST # ST (N e w p e rs o n a l c o d e ) D4 D5 D6 ST * 1 (L o c k N o .1 ) D7 D8 D9 ST *2 D4 D7 D1 D5 D8 D2 D6 D9 D3 ST ST ST *1 *2 *0
(P e rs o n a l c o d e ) C h a n g e s L o c k N o .2 : S T D 1 D 2 D 3 S T
(P e rs o n a l c o d e ) (L o c k N o .2 ) C h a n g e s P e r s o n a l C o d e , L o c k N o .1 a n d L o c k N o .2 a t o n e tim e ST D1 D2 D3 ST # ST D4 D5 D6 ST * 0 ( c o n tin u e d ) ST *2 ( O ld p e r s o n a l c o d e ) (N e w p e rs o n a l c o d e ) ST D7 D8 D9 ST * 1 ST D10 D11 D12 (L o c k N o .1 ) P e r s o n a l/L o c k N o .1 /L o c k N o .2 c a n c e l o p e r a tio n C a n c e ls P e r s o n a l c o d e : S T C a n c e ls L o c k N o .1 : S T C a n c e ls L o c k N o .2 : S T D1 D1 D1 D2 D2 D2 D3 D3 D3 ST ST # # ST ST ST # # # ST 1 2 # 0 (L o c k N o .2 )
T e m p o r a r y r e le a s e b o th o f th e lo c k n u m b e r s ( L o c k N o .1 , L o c k N o .2 ) : S T D 1 D 2 D 3 S T # D m D m + 1 D m + 2 D l ... D n (P e rs o n a l c o d e )
N o te : D 1 ~ D 1 2 = 0 ~ 9 Dm Dm +1 Dm +2 = 0~9 D l ... D n = 0 ~ 9 , * , #
*
N o te : R M : R e d ia l m e m o r y S A M : S a v e d ia lin g m e m o r y D 1 D 2 ... D n : 0 ~ 9 D n + 1 ... D m : 0 ~ 9 , * , # D m + 1 ... D I: 0 ~ 9 , * , # D I+ 1 ... D K : 0 ~ 9 , * , #
Rev. 1.10
17
October 1, 2002
HT9320 Series
Timing Diagrams
Normal dialing
* Pulse mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 T
DB
D2 R T
DB
T
DB
XM UTE T PO T
B
PDP
T
ID P
-T
M
T
ID P
-T
M
T
PDP
T
ID P
T
M
T
M
T
M
DTM . 1 .2 k H z c a r r ie r T X2 20m s 20m s
KT
KT T
KT
T
KT
T
ID P
-T
M
* Tone mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 T
DB
D2 T
DB
R T
DB
XM UTE
PO T DTM . T KT X2 20m s 20m s
T M IN IT P M
T
IT P M
T
IT P M
T
IT P M
Rev. 1.10
18
October 1, 2002
HT9320 Series
Dialing with Pause key
* Pulse mode
H ig h Im p e d a n c e HKS
K E Y IN T XM UTE
DB
D1
D2 P T
DB
D3 T
DB
T
P
+T
T
PDP
DB
T PO DTM .
PDP
T
ID P
T
ID P
T
M
T KT T X2 20m s
KT
ID P
-T
M
1 .2 k H z c a r r ie r T
KT
* Tone mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 T
DB
D2
P
D3 T
P
XM UTE
PO T DTM . T
IT P M T M IN
T
IT P M
T
IT P M
KT X2 20m s
Rev. 1.10
19
October 1, 2002
HT9320 Series
Flash key operation
H ig h Im p e d a n c e HKS
K E Y IN .
T XM UTE
DB
PO T
.
T
.P
DTM .
KT T X2 20m s
1 .2 k H z c a r r ie r
KT
Pulse (R) Tone operation
H ig h Im p e d a n c e HKS
K E Y IN T XM UTE
DB
D1
D2 T
DB
* /T T
DB
D3 T
ID P
T
P
(R)
T
T PO
PDP
T
ID P
+T
PDP
T
T M IN
T
IT P M
DTM . KT T X2 20m s
KT
1 .2 k H z c a r r ie r
Rev. 1.10
20
October 1, 2002
HT9320 Series
One key redial operation
H ig h Im p e d a n c e HKS
K E Y IN
D1 T
DB
D2 T T
IT P M DB
R T T
IT P M DB
T
IT P M
XM UTE
PO T DTM .
BRK
(1 .2 s e c s )
TRP (1 s e c ) T
IT P M
KT X2 20m s
CLOCK & DOUT operating
H ig h Im p e d a n c e HKS
K E Y IN
D1
XM UTE T PO T KT
KT DB
T
PDP
T
B
T
M
(3 4 m s ) 1 .2 k H z C a r r ie r
CLO CK .
CLO CK
= 2 .4 k H z
DOUT X2 20m s
D a ta
N o te : D 1 = D 3 = 3 D2=2
Rev. 1.10
21
October 1, 2002
HT9320 Series
T ip A92 100kW 330kW 1m. 16V 100kW 3 .3 k W A42 H a n d fre e 0 .0 2 m . 10kW V 1m. 47kW H o ld
DD
O ff-h o o k 22M W 100kW 220kW 33kW 220kW 1N4148 O n -h o o k 10m. 50V
R in g 1 A b r id g e
2 .2 k W 1N4148 1N4148 1N4148 x 4 22kW 22kW 5 .1 V 0 .1 m . 100kW 220kW 270kW
1N4148 1m.
1 .5 k W 47kW 0 .1 m . 100m.
150W
SA P 2 . 6 5 A 9 8 ST # 0 R M 5/ M 15 M 4/ M 14 M 9/ M 19 M 10/ M 20 Rk Rk 7 7 * /T M 3/ M 13 M 8/ M 18 6 4 3 M 2/ M 12 M 7/ M 17 5 4 1
PAGE
M 1/ M 11 M 6/ M 16
3
10
21
16
17
14
8
R1 R2 R3 R4 R5 C6
27
H.I
PO
HDO
HDI
VDD
HKS
DTM .
18 H.O 20
H T9320A
XM UTE
HST
19 2
SPEECH NETW ORK
1m.
C5 C4 C3 C2 C1 VSS 26 25 24 23 22 15
MODE 11 VDD 10pps 20pps Tone 10p. 39p.
X1 12
X2 13 3 .5 8 M H z re s o n a to r 39p.
M /B 9
O n -h o o k s to re 4 0 /6 0 3 3 /6 6 O ff-h o o k s to re
Application Circuits
1N4148
Application circuit 1
3~5V
Rev. 1.10
*Rk (R *Un *A
is fo e fe r spec 1m.
r th e to th ifie d capa
d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw
ig n a l alde rs a re een
op sc o XM
tio r ip f8 U
n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d
22
October 1, 2002
HT9320 Series
T ip A92 100kW 1 A b r id g e 100kW 3 .3 k W A42 H a n d fre e 10kW V 1m. 0 .1 m . M 1/ M 11 M 6/ M 16 3 10 21 H.I 16 17 0 .0 2 m . 47kW 1N4148 x 4 H o ld
DD
O ff-h o o k 22M W 100kW 220kW 330kW 1m. 16V 2 .2 k W 33kW 220kW 1N4148 O n -h o o k 10m. 50V
R in g
1N4148 1N4148 1N4148 220kW 22kW 22kW 270kW 0 .1 m . 1 .5 k W 150W 1m.
5 .1 V
100kW 100m. 14 8
47kW 1N4148
SA P 2 4 5 7 8 0 # R M 5/ M 15 M 10/ M 20 Rk Rk * /T 9 ST M 4/ M 14 M 9/ M 19 7 6 A M 3/ M 13 M 8/ M 18 6 5 3 . M 2/ M 12 M 7/ M 17 4 1
PAGE
R1 R2 R3 R4 R5 C6
27
PO
HDO
HDI
VDD
HKS
47kW DTM . 18 H.O 20
H T 9 3 2 0 B /L
XM UTE
DOUT
19 2 1m.
SPEECH NETW ORK
C5 C4 C3 C2 C1 VSS 26 25 24 23 22 15
MODE 11 V
DD
X1 12 10pps
X2 13
CLO CK 9 3 .5 8 M H z re s o n a to r 10p. 20pps Tone 39p. H T16XX L C D D R IV E R (s e e H T 1 6 X X d a ta ) 39p.
Application circuit 2
Rev. 1.10
*Rk (R *Un *A
is fo e fe r spec 1m.
r th e to th ifie d capa
d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw
ig n a l alde rs a re een
op sc o XM
tio r ip f8 U
n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d
23
October 1, 2002
HT9320 Series
T ip A92 100kW R in g 1 A b r id g e 2 .2 k W 3 .3 k W 1N4148 47kW A42 1N4148 O n -h o o k 100kW
O ff-h o o k
22M W
1N4148 220kW 270kW
1m.
1 .5 k W
150W
V
DD
5 .1 V 0 .1 m . 100m. 11 7 13 100kW
0 .1 m . 15 2
SA P 2 4 5 7 8 0 # R M 5/ M 15 M 10/ M 20 Rk Rk * /T 9 ST M 4/ M 14 M 9/ M 19 6 6 A M 3/ M 13 M 8/ M 18 5 4 3 . M 2/ M 12 M 7/ M 17 3 1
PAGE
M 1/ M 11 M 6/ M 16
R1 R2 R3 R4 R5 C6
21
PO
VDD
HKS
DTM .
H T9320C
XM UTE
14 1m.
SPEECH NETW ORK
C5 C4 C3 C2 C1 VSS 20 19 18 17 16 12
MODE 8 V
DD
X1 9 10pps
X2 10 3 .5 8 M H z re s o n a to r 10p. 20pps Tone 39p. 39p.
Application circuit 3
Rev. 1.10
*Rk (R *Un *A
is fo e fe r spec 1m.
r th e to th ifie d capa
d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw
ig n a l alde rs a re een
op sc o XM
tio r ip f8 U
n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d
24
October 1, 2002
HT9320 Series
T ip A92 100kW R in g 1 A b r id g e 100kW 3 .3 k W A42 H a n d fre e 10kW V 1m. 0 .1 m . M 1/ M 11 M 6/ M 16 3 10 21 H.I
PO
H o o k o ff H ook on 10m. 50V 330kW 1m. 16V 2 .2 k W 33kW 220kW 220kW 1N4148 100kW
22M W
1N4148 1N4148 1N4148 1m.
47kW H o ld
DD
1N4148 x 4 22kW 22kW 5 .1 V 0 .1 m . 100m. 16 HDO 17 14 8
220kW 270kW 1 .5 k W 100kW 47kW 150W
0 .0 2 m .
SA P(R) T . 3 5 4 6 8 7 9 0 * # R /P M 5/ M 15 M 10/ M 20 Rk Rk ST M 4/ M 14 M 9/ M 19 7 A M 3/ M 13 M 8/ M 18 6 5 M 2/ M 12 M 7/ M 17 4 1 2
PAGE
R1 R2 R3 R4 R5 C6
27
HDI
VDD
HKS
DTM .
18 H.O 20
H T9320H
XM UTE
HST 2
19 1m.
SPEECH NETW ORK
C5 C4 C3 C2 C1 VSS 26 25 24 23 22 15
MODE 11 V
DD
X1 12 10pps
X2 13
M /B 9
3 .5 8 M H z re s o n a to r 10p. 20pps Tone 39p. 39p. O n -h o o k s to re 3 3 /6 6 4 0 /6 0 O ff-h o o k s to re
1N4148
Application circuit 4
3~5V
Rev. 1.10
*Rk (R *Un *A
is fo e fe r spec 1m.
r th e to th ifie d capa
d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw
ig n a l alde rs a re een
op sc o XM
tio r ip f8 U
n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d
25
October 1, 2002
HT9320 Series
T ip A92 100kW 330kW 1m. 16V 100kW 3 .3 k W A42 H a n d fre e 10kW V 1m . 0 .0 2 m . 47kW H o ld
DD
O ff-h o o k O n -h o o k 10m. 50V 33kW 220kW 220kW 1N4148 100kW
22M W
R in g 1 A b r id g e
2 .2 k W 1N4148 1N4148
1N4148 1m.
1N4148 x 4 22kW 22kW 5 .1 V 0 .1 m . 100m.
220kW 270kW 0 .1 m . 100kW 47kW 1 .5 k W 150W
SA P 2 . 6 5 A 9 8 ST # 0 R M 5/ M 15 M 10/ M 20 Rk Rk M 4/ M 14 M 9/ M 19 7 7 * /T M 3/ M 13 M 8/ M 18 6 5 4 3 M 2/ M 12 M 7/ M 17 4 1
PAGE
M 1/ M 11 M 6/ M 16
3
10
21 H.I
PO
16 HDO
17
14
8
R1 R2 R3 R4 R5 C6
27
HDI
VDD
HKS
DTM .
18 H.O 20
H T9320K
XM UTE
KT
19 2 1m.
SPEECH NETW ORK
C5 C4 C3 C2 C1 VSS 26 25 24 23 22 15
MODE 11 V
DD
X1 12 10pps
X2 13 3 .5 8 M H z re s o n a to r 10p. 20pps Tone 39p.
B uzzer
Application circuit 5
39p.
Rev. 1.10
*Rk (R *Un *A
is fo e fe r spec 1m.
r th e to th ifie d capa
d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw
ig n a l alde rs a re een
op sc o XM
tio r ip f8 U
n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d
26
October 1, 2002
HT9320 Series
Package Information
28-pin DIP (600mil) outline dimensions
A 28 B 1 14 15
H C D E . G
a
I
Symbol A B C D E F G H I a
Dimensions in mil Min. 1445 535 145 125 16 50 3/4 595 635 0 Nom. 3/4 3/4 3/4 3/4 3/4 3/4 100 3/4 3/4 3/4 Max. 1465 555 155 145 20 70 3/4 615 670 15
Rev. 1.10
27
October 1, 2002
HT9320 Series
22-pin SKDIP (300mil) outline dimensions
A 22 B 1 12 11
H C D E . G
a
I
Symbol A B C D E F G H I a
Dimensions in mil Min. 1085 253 125 125 16 50 3/4 295 330 0 Nom. 3/4 3/4 3/4 3/4 3/4 3/4 100 3/4 3/4 3/4 Max. 1105 263 135 145 20 70 3/4 315 375 15
Rev. 1.10
28
October 1, 2002
HT9320 Series
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China 200233 Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor Inc. (Shenzhen Sales Office) 5/F, Unit A, Productivity Building, Cross of Science M 3rd Road and Gaoxin M 2nd Road, Science Park, Nanshan District, Shenzhen, China 518057 Tel: 0755-8616-9908, 8616-9308 Fax: 0755-8616-9533 Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721, Jinyu Tower, A129 West Xuan Wu Men Street, Xicheng District, Beijing, China 100031 Tel: 010-6641-0030, 6641-7751, 6641-7752 Fax: 010-6641-0125 Holtek Semiconductor Inc. (Chengdu Sales Office) 709, Building 3, Champagne Plaza, No.97 Dongda Street, Chengdu, Sichuan, China 610016 Tel: 028-6653-6590 Fax: 028-6653-6591 Holmate Semiconductor, Inc. (North America Sales Office) 46729 Fremont Blvd., Fremont, CA 94538 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com
Copyright O 2002 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holteks products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
Rev. 1.10
29
October 1, 2002

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